As devices manufactured using integrated circuits continue to shrink, the need for smaller packages for the integrated circuit devices continues to increase. One approach increasingly used to save space on a system circuit board and to reduce the board area used is to provide two or more integrated circuits in a combined, vertically arranged package structure called a “Package on Package” or “PoP” device. The PoP structure reduces the system board area that would otherwise be needed, and also eliminates the need for some of the connector traces on the circuit board that would otherwise connect the devices to each other. Through via connections may be used to provide electrical connections between the vertically arranged packaged devices.
For example, a memory module may be mounted as the upper package in a PoP structure. The memory module could include one, two or more commodity memory devices such as DDR DRAM, SRAM or FLASH devices, as non-limiting examples. In a conventional PoP structure, the upper package substrate may be a multiple level circuit board, and may be formed of a resin, such as glass reinforced epoxy resin, FR4, BT resin, ceramic, plastic, film, or other substrate materials including those with woven glass fiber cores in a resin material.
The bottom surface of the upper substrate may have one or more rows of PoP connectors extending vertically away from the bottom surface of the top substrate. These PoP connectors provide the connections from the memory module to either the integrated circuit mounted on the bottom package of the PoP device, or, to connections that will be mapped to the system board when the PoP device is finally mounted on the system circuit board. Typically these PoP connectors are solder balls. Solder balls have a certain minimum size and also a minimum required spacing between the balls (minimum pitch). The characteristics of the conventional solder balls as PoP connectors limit the thinness of the resulting structure, and also limit the number of input/output connections to the upper package that can be supported without enlarging the area of the PoP structure.
The bottom package is a substrate that also has at least one integrated circuit mounted on it. The upper surface of the bottom package has lands or pads for receiving and electrically connecting to the PoP connectors. For example, if the PoP connectors are rows of solder balls, lands or pads on the upper surface of the bottom package will correspond to, and receive, those connectors.
The bottom substrate of the PoP will also have external connectors for making the final connection between the PoP structure and the system circuit board. The bottom package may be a ball grid array (“BGA”) type package and have solder balls arranged in an array on the bottom surface.
As the number of input-output connections to the devices in the PoP structure increases, up to and including so-called “wide I/O” devices which may have greater than 1200 connections, PoP structures formed using conventional approaches either have to be increased in board area, and/or increased in thickness, to provide the needed connections. Use of the conventional solder balls as the PoP connectors between the upper and lower packages also limits the package thinness that can be achieved.
The drawings, schematics and diagrams are illustrative and not intended to be limiting, but are examples of embodiments of the disclosure, are simplified for explanatory purposes, and are not drawn to scale.